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LatticeXP2 (74)
Article Type
Type of Issue
Documentation (5)
Hardware (43)
IP/Reference Design (5)
Software (19)
Related To
Topic ID Family Article Type Category Related To
Do you have any work examples of master/slave pass-thru use for wishbone compatible code? 5245 LatticeXP2 faq Lattice IP/Reference Design
Can other devices be connected to the SPI bus between the processor and the FPGA? 5064 LatticeXP2 faq Device Programming Embedded Programming
How to fix unknown exception when trying to launch Diamond 3.8? 5073 LatticeXP2 faq Installation Win Other
How can I specify a LVPECL differential I/O in my RTL source code? 4980 LatticeXP2 faq Implementation
Why is GSR recognized during synthesis, but does not appear to work on hardware? 4899 LatticeXP2 faq Architecture General Logic
Error Code 9 while running Diamond Programmer 5327 LatticeXP2 faq Simulation Aldec
Why is clock load of the .par report does not match the number of registers in .mrp... 5532 LatticeXP2 faq Other
Is it recommended to use epoxy glue material to bond FPGAs on board? 3741 LatticeXP2 faq Customer Board Design Board Debug
Why does Diamond 3.10 SP3 closes and a "Catch unknown exception" error occurs when... 5560 LatticeXP2 faq Entry Schematic
How to resolve the following Lattice Diamond error "ERROR:core0 incorrect response(Writ... 5247 LatticeXP2 faq Debugging Reveal
Does isP lever classic supports LFXP2-8E-5FTN256I device? 5199 LatticeXP2 faq Other
Is it possible to connect XP2 FPGA and two MachXO2 FPGAs in a daisy chain for programming? 5172 LatticeXP2 faq Device Programming Diamond Programmer
Why did "Catch Unknown Exception" error occurs? 5679 LatticeXP2 faq Installation
Why is the .vme file size smaller than the bitstream format? 4810 LatticeXP2 faq Device Programming Embedded Programming
How to define even or odd parity while using Universal Asynchronous Receiver Transmitte... 3665 LatticeXP2 faq Lattice IP/Reference Design UART
Please explain how the "DONE_EX" preference works? 3659 LatticeXP2 faq Device Programming Customer Board
Why is the LVDS data not received correctly with LatticeXP2 when the fail-safe... 2895 LatticeXP2 faq Architecture IO
What does the I/O Type in Table 14-1 of TN1141 mean? For example, is the INITN pin only... 2453 LatticeXP2 faq Architecture IO
What methods are available to initiate configuration for the LatticeXP2? 2436 LatticeXP2 faq Device Programming Configuration/Programming
Why do I get an error complaining of the RELEASE pin when I'm compiling the library... 2334 LatticeXP2 faq Simulation MTI
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