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  • Soft I2C Bus Master

    Reference Design

    Soft I2C Bus Master

    Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families
    Soft I2C Bus Master
  • Soft I2C Master and Slave – Simple Write and Read

    Demo

    Soft I2C Master and Slave – Simple Write and Read

    Demonstrates the operation of an I2C Master and Slave doing simple write and read of data.
    Soft I2C Master and Slave – Simple Write and Read
  • Soft I2C Slave Peripheral

    Reference Design

    Soft I2C Slave Peripheral

    Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families
    Soft I2C Slave Peripheral
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