Lattice Solutions

Everything you need to quickly and easily complete your design

Solution Type



Device Support







Tags































Providers

  • Byte to Pixel Converter

    IP Core

    Byte to Pixel Converter

    Modular MIPI/D-PHY IP - Converts Parallel Data From a D-PHY Receiver into Pixel Format
    Byte to Pixel Converter
  • CSI-2/DSI D-PHY Receiver

    IP Core

    CSI-2/DSI D-PHY Receiver

    Modular MIPI/D-PHY IP - PHY for receiving MIPI CSI-2/DSI Data for further processing. Supports up to 4 MIPI lanes to 10Gb/s
    CSI-2/DSI D-PHY Receiver
  • CSI-2/DSI D-PHY Transmitter

    IP Core

    CSI-2/DSI D-PHY Transmitter

    Modular MIPI/D-PHY IP - PHY for transmitting MIPI CSI-2/DSI Data. Supports up to 4 MIPI lanes to 10Gb/s
    CSI-2/DSI D-PHY Transmitter
  • FPD-LINK Receiver

    IP Core

    FPD-LINK Receiver

    Modular MIPI/D-PHY IP - Converts FPD-LINK Video Streams to Pixel Clock Domain
    FPD-LINK Receiver
  • FPD-LINK Transmitter

    IP Core

    FPD-LINK Transmitter

    Modular MIPI/D-PHY IP - Convert Pixel Data Streams to an FPD-LINK Video Stream
    FPD-LINK Transmitter
  • Pixel to Byte Converter

    IP Core

    Pixel to Byte Converter

    Modular MIPI/D-PHY IP - Converts Pixel Format Data to Parallel Byte Format
    Pixel to Byte Converter
  • SubLVDS Image Sensor Receiver

    IP Core

    SubLVDS Image Sensor Receiver

    Modular MIPI/D-PHY IP - Converts SubLVDS Image Sensor Video Stream to Pixel Clock Domain
    SubLVDS Image Sensor Receiver
  • 1 to N MIPI CSI-2/DSI Duplicator

    Reference Design

    1 to N MIPI CSI-2/DSI Duplicator

    Modular MIPI/D-PHY Reference Design - Duplicate one MIPI CSI-2 channel to N DSI channels
    1 to N MIPI CSI-2/DSI Duplicator
  • 4 to 1 Image Aggregation with CrossLink-NX

    Reference Design

    4 to 1 Image Aggregation with CrossLink-NX

    Modular MIPI/D-PHY Reference Design - Aggregates four MIPI CSI-2 inputs to a single output stream.
    4 to 1 Image Aggregation with CrossLink-NX
  • MIPI CSI-2 Virtual Channel Aggregation

    Reference Design

    MIPI CSI-2 Virtual Channel Aggregation

    Modular MIPI/D-PHY Reference Design - Adaptable and flexible solution combines multiple MIPI CSI-2 inputs to a single CSI-2 output stream.
    MIPI CSI-2 Virtual Channel Aggregation
  • MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge

    Reference Design

    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge

    Modular MIPI/D-PHY Reference Design - Complete solution integrates the Byte to Pixel Converter, CSI-2/DSI D-PHY Receiver and FPD-LINK (OpenLDI) Transmitter
    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge
  • N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Reference Design

    N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Modular MIPI/D-PHY Reference Design - Aggregate multiple MIPI CSI-2 inputs up to 5 channels horizontally line by line to a single CSI-2 output
    N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation
  • SubLVDS to MIPI CSI-2 Image Sensor Bridge

    Reference Design

    SubLVDS to MIPI CSI-2 Image Sensor Bridge

    Modular MIPI/D-PHY Reference Design - Complete solution integrates the Pixel to Byte Converter, SubLVDS Image Sensor Recevier and CSI-2/DSI D-PHY Transmitter
    SubLVDS to MIPI CSI-2 Image Sensor Bridge
  • 4 Input to 1 Output MIPI CSI-2 Image Aggregation Demo

    Demo

    4 Input to 1 Output MIPI CSI-2 Image Aggregation Demo

    Modular MIPI/D-PHY Demonstration - Aggregates four MIPI CSI-2 inputs to a single parallel output stream, which is then displayed on HDMI.
    4 Input to 1 Output MIPI CSI-2 Image Aggregation Demo
  • 3D Depth Mapping

    Demo

    3D Depth Mapping

    Determines the distance between an embedded device and an object using a Semi-Global Block Matching (SGBM) algorithm to determine 64 different disparity levels
    3D Depth Mapping
  • KONDOR AX Development Board

    Board

    KONDOR AX Development Board

    ECP5 board for system design of HetNet, Industrial IoT, Cameras and Display applications
    KONDOR AX Development Board
  • CrossLink: LIF-MD6000 – Master Link Board

    Board

    CrossLink: LIF-MD6000 – Master Link Board

    Expandable master CrossLink platform with connectors for daughter boards. Includes I/O Link Boards.
    CrossLink: LIF-MD6000 – Master Link Board
  • MIPI CSI-2 Receive Bridge

    Reference Design

    MIPI CSI-2 Receive Bridge

    Enables a mobile CSI-2 (Camera Serial Interface) image sensor to interface to an embedded Image Signal Processor. Up to 4 lanes at 900 Mbps per lane
    MIPI CSI-2 Receive Bridge
  • MIPI CSI-2 Transmit Bridge

    Reference Design

    MIPI CSI-2 Transmit Bridge

    Enables bridging of image inputs like subLVDS or HiSPI to MIPI CSI-2. Up to 4 lanes at 900 Mbps per lane
    MIPI CSI-2 Transmit Bridge
  • MIPI DSI Receive Bridge

    Reference Design

    MIPI DSI Receive Bridge

    Allows an AP (Application Processor) or other DSI source to interface to a non-DSI (such as LVDS) display. Up to 4 data lanes at 900 Mbps per lane
    MIPI DSI Receive Bridge
  • Page 1 of 2
    First Previous
    1 2
    Next Last
    Like most websites, we use cookies and similar technologies to enhance your user experience. We also allow third parties to place cookies on our website. By continuing to use this website you consent to the use of cookies as described in our Cookie Policy.